A high speed voltage translator circuit includes a voltage divider coupled between first and second power supplies, a transconductance amplifier coupled between third and fourth power supplies including a non-inverting voltage input coupled to the voltage divider, an inverting voltage input for receiving an input signal, and a current output, and a current comparator coupled between the third and fourth power supplies having an input coupled to the current output of the transconductance amplifier, and an output for providing a translated output voltage. The translated output voltage transitions between the third and fourth power supply voltage levels, the third power supply voltage level being more positive than a first power supply voltage level, and the fourth power supply voltage level being more negative than a second power supply voltage level.

 
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