An apparatus that reduces parasitic capacitance in a MEMS device includes a dielectric layer on the surface of a silicon-on-insulator (SOI) substrate, a conductor embedded in the substrate and disposed between the dielectric layer and a buried oxide layer, and surface conductors on the dielectric layer and coupled to ends of the embedded conductor. A boundary region surrounds the embedded conductor and separates an inner region and an outer region of substrate, providing a p-n junction between the boundary region and the outer region of SOI substrate which is reverse biased to electrically isolate the inner region from the outer region of SOI substrate. An amplifier has an input connected to one end of the embedded conductor and an output connected to the inner region of the substrate. The amplifier senses a voltage at the input and produces a voltage that approximates the voltage at the output.