A semiconductor memory device is provided. The semiconductor memory device includes a plurality of memory cells arranged in multiple column groups, each column group having, a plurality of columns and a plurality of external bit-lines for independent multi-way configurable access. The column group having a first, second, and third level of hierarchy in the external bit-lines. The first level of the hierarchy provides connectivity to the plurality of memory cells. The second level of the hierarchy provides a first splicer for multiplexing data to and from each of the columns in the column group to an intermediate bit-line. The third level of the hierarchy includes a second splicer for multiplexing data to and from multiple external access paths to the intermediate bit-line. A structurally reconfigurable circuit device and methods for designing a circuit are also provided.