An A/D converter comprises capacitors C1, C2, C3, C4, and C5 coupled via a plurality of switches to a differential input/differential output amplifier 1. The capacitor C5 determines a gain of the amplifier 1. A reset level is stored in the capacitor C1, and a signal level is stored in the capacitor C2. One terminal of the capacitor C1 and one terminal of the capacitor C2 are coupled to the respective differential inputs, and the other terminals of the capacitors C1, C2 are coupled to each other, whereby the amplifier 1 generates a difference signal between the reset level and the signal level. The cyclic A/D conversion of this difference signal is performed by switching the capacitors C1, C2, C3, and C4 coupled via a plurality of switches to the differential-input/differential-output amplifier 1, thereby obtaining an A/D conversion value with reduced random noise.