A charge balance semiconductor power device comprises an active area having strips of p pillars and strips of n pillars arranged in an alternating manner, the strips of p and n pillars extending along a length of the active area. A non-active perimeter region surrounds the active area, and includes at least one p ring surrounding the active area. One end of at last one of the strips of p pillars extending immediately adjacent an edge of the active area terminates at a substantially straight line at which one end of each of the remainder of the strips of p pillars also end. The straight line extends perpendicular to the length of the active area along which the strips of n and p pillars extend.

 
Web www.patentalert.com

< Semiconductor device and method of manufacturing the same

> Semiconductor processing method for increasing usable surface area of a semiconductor wafer

> Semiconductor device and manufacturing method thereof

~ 00547