A control signal generating circuit (1) comprises a comparator (10) for comparing an output voltage V.sub.O with a reference voltage outputted from a reference voltage source (11), a flipflop (12) set by the output of the comparator (10), and a pulse control circuit (13) which receives an input voltage V.sub.IN, a reference voltage V.sub.REF2, and the inverted output of the flipflop (12), sets the on time in accordance with the ratio between the input voltage V.sub.IN and the reference voltage V.sub.REF2, and resets the flipflop (12) when the on time elapses after the output pulse of the flipflop (12) rises. The output pulse of the flipflop (12) is outputted as a control signal into a driver logic circuit (2). The driver logic circuit (2) performs on/off control of NMOSs (3, 4) according to the control signal. Thus, a switching regulator capable of operating at high speed can be realized.