A MOS device having optimized stress in the channel region and a method
for forming the same are provided. The MOS device includes a gate over a
substrate, a gate spacer on a sidewall of the gate wherein a non-silicide
region exists under the gate spacer, a source/drain region comprising a
recess in the substrate, and a silicide region on the source/drain
region. A step height is formed between a higher portion of the silicide
region and a lower portion of the silicide region. The recess is spaced
apart from a respective edge of a non-silicide region by a spacing. The
step height and the spacing preferably have a ratio of less than or equal
to about 3. The width of the non-silicide region and the step height
preferably have a ratio of less than or equal to about 3. The MOS device
is preferably an NMOS device.