A data transfer control device for data transfer through a bus including a state execution circuit conducting each state process of first-Nth states in order to perform a state control of the data transfer control device, a transfer controller performing a control for the data transfer based on a result of the state process execution in the state execution circuit, a command register in which a state transition execution command is set, and a control circuit decoding the state transition execution command set in the command register and controlling the state execution circuit based on a result of the decoding, the control circuit controlling the state execution circuit to execute a Kth (1.ltoreq.K.ltoreq.N) state process if an individual state transition execution command that changes the state of the data transfer control device to the Kth state is set in the command register, and the control circuit controlling the state execution circuit to execute a plurality of state processes consecutively from a Lth (1.ltoreq.L.ltoreq.N) state to a Mth (1.ltoreq.M.ltoreq.N) state if a successive transition execution command is set in the command register, the successive transition execution command successively changing the state of the data transfer control device from the Lth state to the Mth state.