A precedence determination system including a first type memory bank configured to receive a first search signal and to provide first search result indications, a second type memory bank configured to receive a second search signal and to provide second search result indications, a precedence number table coupled to the first and second type memory banks and configured to provide programmable precedence numbers, and a precedence determination circuit coupled to the first and second type memory banks and the precedence number table and configured to provide a third search result indication is disclosed. In one embodiment, the first type memory bank can be a static random access memory (SRAM) and the second type memory bank can be a ternary content addressable memory (TCAM).

 
Web www.patentalert.com

< Storage defragmentation based on modified physical address and unmodified logical address

> Identifying and relocating relocatable kernel memory allocations in kernel non-relocatable memory

> Method and apparatus for multistage volume locking

~ 00533