The present invention is directed to an integrated circuit module device.
The device includes a first semiconductor chip having a first circuit
layer and at least one first interconnection element disposed on a first
chip surface. The at least one first interconnection element is
electrically coupled to the first circuit layer. A second semiconductor
chip includes a second circuit layer and at least one second
interconnection element disposed on a second chip surface. The at least
one second interconnection element is electrically coupled to the second
circuit layer. The at least one first interconnection element is
connected to the at least one second interconnection element to establish
electrical continuity between the first circuit layer and the second
circuit layer. The first surface is adjoined to the second surface. At
least one ring delay circuit includes a first ring delay path partially
disposed on the first circuit layer and a second ring delay path
partially disposed on the second circuit layer. The first ring delay path
and the second ring delay path form a signal path having a predetermined
measurement signature. The ring delay circuit compares the predetermined
measurement signature to a test measurement signature.