Anti-pirate circuitry is provided for combating the theft of intellectual
property contained with semiconductor integrated circuits. The
anti-pirate circuit includes a unique number generator that provides a
multi-bit die ID data string that is unique to the integrated circuit
associated with the anti-pirate circuit. One time programmable (OTP)
EPROM circuitry reads the die ID data string at wafer sort and writes the
data content to nonvolatile memory. During a subsequent verification
cycle, ID comparator circuitry compares the data string provided by the
unique number generator to the stored contents of the nonvolatile memory.
If the comparison results in a mismatch between more than a predefined
number of bits, then the integrated circuit associated with the
anti-pirate circuit is not enabled for operation.