A racetrack memory storage device moves domain walls along the racetrack in one direction only. The reading element can be positioned at one end of the racetrack (rather than in the middle of the racetrack). The domain walls are annihilated upon moving them across the reading element but their corresponding information is read into one or more memory devices (e.g., built-in CMOS circuits). The information can then be processed in circuits for computational needs and written back into the racetrack either in its original form (as it was read out of the racetrack) or in a different form after some computation, using a writing element positioned at the end of the racetrack opposite to the reading element. Such a racetrack can be built more simply and has greater reliability of operation than previous racetrack memory devices.