A radio frequency identification (RFID) circuit including a semi-static flip-flop having a static storage time longer than its dynamic storage time. The RFID circuit may include a timing block circuit to provide a timing block clock signal to the semi-static flip-flop, the signal having a first clock state duration shorter than the dynamic storage time and a second clock state duration longer than the dynamic storage time.

 
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> Receiver and a method of attenuating a disturbance signal by a trap circuit having its resonance frequency adjustable

> Gain controlled external low noise amplifier

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