A multi-mode memory buffer device for use in various memory subsystem structures. The buffer device includes a packetized multi-transfer interface which is redriven to permit connection between a first memory assembly and cascaded memory assemblies. The buffer device also includes a memory interface adapted to connect to either a second memory assembly or directly to memory devices.

 
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< System, method and storage medium for providing segment level sparing

> Synchronization of change-tracked data store with data store having limited or no change tracking

> Secure password entry

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