A distributed system structure for a large-way, symmetric multiprocessor
system using a bus-based cache-coherence protocol is provided. The
distributed system structure contains an address switch, multiple memory
subsystems, and multiple master devices, either processors, I/O agents,
or coherent memory adapters, organized into a set of nodes supported by a
node controller. The node controller receives transactions from a master
device, communicates with a master device as another master device or as
a slave device, and queues transactions received from a master device.
Since the achievement of coherency is distributed in time and space, the
node controller helps to maintain cache coherency. A transaction tag
format for a standard bus protocol is expanded to ensure unique
transaction tags are maintained throughout the system. A sideband signal
is used for intervention and Reruns to preserve transaction tags at the
node controller in certain circumstances.