A semiconductor apparatus is disclosed, including: multiple parallel
monitor circuits each configured to control charge to a capacitor by
controlling a transistor that bypasses, if the voltage of the capacitor
exceeds a predetermined reference voltage, charge current provided to the
capacitor. The semiconductor apparatus further includes high voltage side
IC connection output terminals each connected to an open drain of N
channel transistor; high voltage side IC connection input terminals each
connected to a terminal of a high resistance component and to an inverter
input terminal; low voltage side IC connection output terminal each
connected to an open drain of P channel transistor; and low voltage side
IC connection input terminal each connected to a terminal of a high
resistance component and to an inverter input terminal.