An image processing circuit includes: a memory that stores the location and pixel values that compose graphical images; a calculation unit that calculates the difference between a target location to which the graphical images is aligned in binary image data and an initial location designated in the graphical images; an output unit that outputs pixel values at locations distanced from the locations of the pixel values by an amount equivalent to the calculated difference; a first multiplier that multiplies the output pixel value with the pixel value included in the binary image data; an inverter that inverts the pixel value in the binary image data; a second multiplier that multiplies the pixel values in the binary image data or the pixel values included in background image data with the inverted pixel values; and an adder that adds the result of the multiplications performed by the first and second multipliers.