A data line drive circuit is equipped with a single line driver and a gate voltage generation circuit. The single line driver is constructed such that N groups (where N is an integer 2 or larger) of series connections of drive transistors and switching transistors are connected in parallel. The gate voltage generation circuit includes two transistors constituting a current mirror circuit, a drive transistor, and a constant voltage generation transistor. The range of an output current I.sub.out can be controlled by changing any of the design values of the parameters including: relative values K.sub.a and K.sub.b of the gain coefficient for the transistors, the source voltage VDREF of the gate voltage generation circuit, and the gate signal VRIN of the drive transistor.