A semiconductor memory device includes: a memory cell array region formed in a semiconductor region of a first conductivity type and having a plurality of memory cells arranged in rows and columns; a plurality of word lines each of which collectively connects ones of the plurality of memory cells aligned in the same row; and a protective diode region formed in the semiconductor region to be separated from the memory cell array region. In the protective diode region, a protective diode element is constructed by making a junction between a first diffusion layer of a second conductivity type formed in the upper portion of the semiconductor region and the semiconductor region. Each of the word lines extends to the protective diode region and is brought into direct connection to the first diffusion layer of the second conductivity type, thereby making electrical connection to the protective diode element.