A semiconductor memory device including a memory cell array and a sense amplifier, wherein the memory cell array includes: a plurality of information cells, in each of which either one of multi-level data is written; a first reference cell with the same structure and the same connection state as the information cell, in which a reference data level is written for generating a first reference current; and a second reference cell, which serves for generating a second reference current used for setting the lowest data level of the multi-level data and for setting the reference data level of the first reference cell.