A system that facilitates the storage of data using a write barrier. The system interfaces to a hardware component that stores data, and includes a write barrier component that dynamically employs instructions compatible with the hardware component to ensure data integrity during storage of the data. The write barrier component is independent of at least an operating system and an application and can operate in a least one of a user mode and a kernel mode. The write barrier component includes at least one of software instructions, routines, and methods, the selection of one or more of which is based on hardware data extracted from the hardware component. A selection component interrogates the hardware component for hardware data to facilitate selection of one or more instructions most suitable for interfacing to the hardware component. A coalescing component combines cache synchronization requests into a single set of instructions, which set is processed to flush a disk cache in one process.

 
Web www.patentalert.com

< Method and system for cache eviction

> Cache line placement prediction for multiprocessor non-uniform cache architecture systems

~ 00479