A capacitor charging arrangement to be supplied by a voltage containing network cycles, and having a gate-controlled semiconductor switch (T.sub.ch) arranged for charging the capacitor (C.sub.aux) and generating a control signal of the gate-controlled semiconductor switch. The control signal is generated with a device that includes a clipper, a first integrator, a second integrator, a cycle indicator, a reset device, an adder, a restricting circuit, a trigger circuit, and an isolation transformer.