Aspects of the present invention are directed to converting non-oscillatory combinational loops into acyclic circuits. Combinational loops may be modeled as state-holding elements where non-oscillatory loops are broken using edge-sensitive latches. In addition to providing a way to model combinational loops originally consisting only of gates (i.e., without originally including any state-holding elements), loops that have paths through user latches may also be converted. The presented methodology may be used with both small and large loops.