Nano-wires, preferably of less than 20 nm diameter, can be formed with
minimized risk of narrowing and breaking that results from silicon atom
migration during an annealing process step. This is accomplished by
masking portion of the active layer where silicon atomer would otherwise
agglomerate with a material such as silicon dioxide, silicon nitride, or
other dielectric that eliminates or substantially reduces the silicon
atom migration. Nano-wires, nanotubes, nano-rods, and other features can
be formed and can optionally be incorporated into devices, such as by use
as a channel region in a transistor device.