A method and apparatus for invalidating cache lines during direct memory
access (DMA) write operations are disclosed. Initially, a multi-cache
line DMA request is issued by a peripheral device. The multi-cache line
DMA request is snooped by a cache memory. A determination is then made as
to whether or not the cache memory includes a copy of data stored in the
system memory locations to which the multi-cache line DMA request are
directed. In response to a determination that the cache memory includes a
copy of data stored in the system memory locations to which the
multi-cache line DMA request are directed, multiple cache lines within
the cache memory are consecutively invalidated.