Provided are an apparatus and method of reducing a glitch in a switching device. The apparatus includes a latch latching a digital input signal and providing a digital output signal, a switching device segment unit including at least two switching device segment units, each one of the at least two switching device segment units switching a portion of the digital signal output, a glitch detection unit detecting a glitch generated within the switching device segment unit; and a voltage/current converter generating a latch control signal in response to an output from the glitch detection unit associated with a detected glitch, the latch control signal controlling an overlap of the digital output signal to reduce the glitch.

 
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< Synchronous multi-phase AC-to-DC converter

> Driven circuit of an emitter switching configuration to control the saturation level of a power transistor when used with highly variable collector currents

~ 00474