An information processing apparatus and an information processing method for use therewith are provided so as to implement optimal signal processing without deterioration of performance when using variable operating frequencies. A frequency information operating section (12) of the apparatus adds a corresponding signal cycle to frequency information Inf about a synchronizing clock signal CLKv having a variable frequency. An information processing section of the apparatus is supplied with the synchronizing clock signal as an operating clock signal, and processes information when results of the addition by the frequency information operating section (12) meet a predetermined condition. Optimized processing is thus accomplished in a manner eliminating wasteful latency times.

 
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> Relocatable built-in self test (BIST) elements for relocatable mixed-signal elements

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