A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm.sup.2 current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H.sub.2 plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm.sup.2 current density and second deposition step at a 60 mA/cm.sup.2 current density is used to deposit a second copper layer that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.