An array substrate of a liquid crystal display includes a gate line, a data line crossing the gate line, a thin film transistor including a gate electrode connected to the gate line, a semiconductor layer having first and second sides, a source electrode contacting the first side of the semiconductor layer and connected to the data line, and a drain electrode contacting the second side of the semiconductor layer, a gate insulating film provided between the gate line and the data line, an organic protective film formed on the gate insulating film, a capacitor common line provided on the organic protective film to overlap the gate line, an upper insulating layer provided on the organic protective film, and a pixel electrode provided on the upper insulating layer partially overlapping the capacitor common line and the data line, the pixel electrode connected to the drain electrode via a contact hole through the upper insulating layer and the organic protective film.

 
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