A method for forming a gate structure includes forming a gate dielectric layer on a semiconductor substrate and a metal gate conductor on the gate dielectric layer. A cap layer is formed on the metal gate conductor. The method provides for patterning the cap layer, the gate metal layer and the gate dielectric layer to form a capped gate conductor. At least one spacer is formed to cover sidewalls of the metal gate conductor and the cap layer, such that the cap layer and the spacer encloses the metal gate conductor layer therein. At least one self-aligned contact structure formed next to the metal gate conductor on the semiconductor substrate. As such, the cap layer and the spacer separate the self-aligned contact structure from directly contacting the metal gate conductor.

 
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< Complementary thin film transistor circuit, electro-optical device, and electronic apparatus

> Gate electrodes and the formation thereof

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