In a standard cell synthesizing step 101, a net list is synthesized from an RTL description, and an instance name list is formed which contrasts a register description portion with an instance name contained in the net list; in a simulation step 103, an operation simulation written by the RTL description is carried out; the toggle information among registers which is extracted in the simulation step 103 is recorded in a toggle storing step 104, a flip-flop-to-flip-flop toggle information database is constructed in which the recorded toggle information corresponds to a flip-flop-to-flip-flop instance name obtained from the instance name list in a mapping step 105; and in an electric power optimizing step 102, a physical designing operation for reducing power consumption is optimized by employing the net list, the flip-flop-to-flip-flop toggle information database, and a timing restriction.