A semiconductor memory apparatus according to the present invention includes: two bank areas each having one-port memories capable of performing writing and reading only with separate timings; a writing control circuit for writing data into said one-port memories in one bank area of the two bank areas; and a reading control circuit for reading data from said one-port memories of the other bank area and zero-clearing memory areas from which data has been read while the writing control circuit is writing data into the one bank area.

 
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