One embodiment of the present invention provides a system that facilitates
phase-buffering on a bit-by-bit basis using a control queue. The system
includes a control queue, wherein a stage in the control queue is
configured to accept both a first control signal and a second control
signal, wherein the first control signal and the second control signal
are mutually exclusive, wherein the first control signal being asserted
indicates the value of a corresponding bit is zero, while the second
control signal being asserted indicates the value of the corresponding
bit is one. A forward-transfer mechanism couples the first control signal
or the second control signal from the input of the stage through storage
elements to the output of the stage. A reverse transfer mechanism accepts
an acknowledgement signal at the output of the stage and transfers the
acknowledgement signal through a storage element to the input of the
stage.