A locking-status judging circuit is composed of a comparator that compares a phase error signal with a reference signal for judging whether or not a digital PLL circuit locks on an input signal and outputs a signal "0 (zero)" or a signal "1 (one)", a selector that outputs a positive or negative number in response to the inputted signal whether it is "0" or "1", a limiter that limits an accumulated number to be within a range of prescribed upper and lower limits, a feedback section that returns the accumulated number, an accumulator that adds the accumulated number and a positive or negative number from the selector and outputs a newly accumulated number, and a lock-state judging section that judges the digital PLL circuit whether it is in a lock-state or an unlock-state in response to an accumulated value of the newly accumulated number whether it is positive or negative.