A circuit includes a chopper switch to receive an analog input signal and output a first chopped signal of a first polarity during a first clock phase and a second chopped signal of a second polarity during a second clock phase. An analog block receives and processes the first and second chopped signals and outputs first and second processed signals, respectively. The analog bock has a first offset voltage associated thereto. The first and second processed signals, each includes a first offset component that is associated with the first offset voltage. A data converter receives and converts the first and second processed signals into first and second digital codes, respectively. An offset canceller receives the first and second digital codes. The offset canceller is configured to remove the first offset components from the first and second digital codes and output a digital output signal corresponding to the analog input signal.