A vertical junction field effect transistor includes a trench formed in an
epitaxial layer. The trench surrounds a channel region of the epitaxial
layer. The channel region may have a graded or uniform dopant
concentration profile. An epitaxial gate structure is formed within the
trench by epitaxial regrowth. The epitaxial gate structure may include
separate first and second epitaxial gate layers, and may have either a
graded or uniform dopant concentration profile.