A method and system for mapping the flow data that will be the subject of wavelet transform equations to a system comprising adders, subtractors, multipliers and/or dividers to perform the mathematical functions set forth in the particular wavelet transform. A shift register is utilized to continually flow the individual data bytes of the data file being processed through the system. By mapping these hardware components to perform the computations involved in wavelet transform equations, an entire data file (e.g., a digital image) can be processed serially as it flows through the shift register triggered by a clock pulse to the shift register.

 
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