In a method for reading the memory cell in a passive matrix-addressable ferroelectric or electret memory array with memory cells in the form of ferroelectric or electret capacitors, sensing means connected to the bit line of memory cell is activated in order to initiate a charge measurement and a first charge value is registered, whereafter a switching voltage is applied to the memory cell and a second charge value is registered. A readout value is obtained by subtracting the first charge value from the second charge value. A sensing device for performing an embodiment of the method comprises a first amplifier stage with an integrator circuit and connected with a second amplifier stage (A2) following the first amplifier stage and with an integrator circuit, and a sampling capacitor connected between an output of the first amplifier stage and an input of the second amplifier stage.

 
Web www.patentalert.com

< Off-chip LC circuit for lowest ground and VDD impedance for power amplifier

> Single frequency repeater

~ 00420