A multi-phase regulator that provides a smooth transition between DCM and CCM by employing partially synchronous rectification in which a duty cycle of a synchronous switch enable signal is gradually increased to 100%. The regulator includes a separate inductor, high-side switch, and synchronous switch for each phase. The high-side switches are controlled based on a separate PWM signal for each phase. Each PWM signal is provided by pulse width modulating the error signal, with each of the PWM signals having a different phase. During the partially synchronous rectification, the synchronous switch turns on when the high-side switch is off and the synchronous switch enable signal is asserted, and the synchronous switch is off otherwise. The synchronous switch enable signal has a frequency relative to the frequency of each of the pulse width modulation output signal such that good current sharing among the inductors of each phase is achieved.

 
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~ 00415