A substrate has intersecting gate and data lines with a gate insulating film therebetween, a thin film transistor provided at an intersection of the gate and data lines, a pixel electrode connected to the transistor, a pad connected to a signal line via a contact hole and containing a transparent conductive film, and a protective film overlapping a color filter array substrate to expose the film. The contact hole exposes the end of the pad and/or signal line and an adjacent area. A gate electrode, source and drain electrodes, and a contact electrode are formed from first, second, and third conductive layers, respectively. A contact hole exposes the first conductive layer of one transistor and an adjacent portion of the second conductive layer of another transistor. The contact electrode connects the exposed first and second conductive layers. Only three mask processes are used in fabricating the substrate.