A transport processor that can be used in a digital audio-video receiver system comprises a front end and a memory interface. The front end receives concurrently a plurality of transport streams, where two or more of the plurality of transport streams can have different formats, and each transport stream includes a plurality of packets. The front end includes a packet processor to create an aggregate transport stream in a single format from the plurality of transport streams. The memory interface is an interface through which the transport processor can store the aggregate transport stream in a memory for use by subsequent decode and display operations.

 
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