A computer system includes a plurality of memory modules that contain
semiconductor memory, such as DIMMs. The system includes a host/data
controller that utilizes an XOR engine to store data and parity
information in a striped fashion on the plurality of memory modules to
create a redundant array of industry standard DIMMs (RAID). The host/data
controller also interleaves data on a plurality of channels associated
with each of the plurality of memory modules. The system implements error
interrupt control, ECC error reporting, cartridge error power down
procedures in response to command errors, storage of error information in
unused segments of each DIMM, hot-pug procedure indicator and remote
tagging capabilities of memory cartridges and DIMMs.