A processor employing synchronization primitives for flexible scheduling of functional unit operations. In one embodiment, a processor may include a number of functional units, each configured to retrieve operations for processing from an operation storage, and where each functional unit is configured to process retrieved operations independently of each other functional unit. The processor may further include instruction fetch logic configured to issue instructions for execution by the processor, where a subset of the instructions are executable to store operations for processing by the functional units into the operation storage. The operations stored by the subset of the instructions may include synchronization operations configured to coordinate processing of other ones of the operations by the plurality of functional units. In one particular implementation of the processor, the synchronization operations may include a suspend operation and a resume operation.