A method, system, apparatus, and machine-readable medium for physical placement of an integrated circuit based on the timing constraints are provided. The method involves a two-pass physical placement technique. After the first pass of the physical placements of the blocks and the top level, the timing results of the top level and of each block are analyzed. The method involves the computation of latency per gate per unit area (LPGA) of the block ports of each block. Based on the calculated LPGA, the timing constraints of the blocks are updated. The second pass of physical placement is performed, based on the updated timing constraints.