A receiver of analogue video signal having means for analogue video signal conversion has a receiving block (201) for receiving a first analogue video signal, a conversion block (202) for conversion of the first analogue signal into a digital signal, a buffer controller (203) of frame buffers, a video coder (204) for transforming the digital signal into an analogue signal of a second format, a receiver (205) for displaying the analogue signal of a second format and a processor (206) for data processing and controlling the receiving block, the conversion block, the buffer controller, the video coder and the receiver. The buffers controller (203) has three modules, namely, buffers (203b) linked together, a decoding frame controller (203a) and a displaying frame controller (203c). Certain frames in this device will be omitted when the output frames frequency is lower than the input frequency and displayed more than once when the output frames frequency is higher than the input frequency.