A processor device capable of cross-boundary alignment of plural register
data and the method thereof. The processor includes a decoder to decode a
multiple shift instruction, a register unit with plural N-bit registers,
a shifter to combine a first and a second output contents of the register
unit to form a 2N-bit word and shift the word by w bits, thereby
outputting first N bits of the word shifted, a controller to set the
register unit in accordance with the multiple shift instruction decoded,
thereby reading contents of corresponding registers for shifting w bits
by the shifter and then writing an output of the shifter to the register
unit.