A digital circuit including a Booth encoder having inputs for receiving a plurality of adjacent bits of a first binary input number, and an encoder control input for allowing selection between multiplication of first and second binary input numbers and multiplication of the pairs of binary numbers smaller than the first or second input number, the encoder being configured to encode the bits of the first binary input number dependent on the encoder control input to generate Booth encoded outputs for use in selection of a partial product, the Booth encoder being for use with a selector having inputs for receiving a plurality of adjacent bits of the second binary input number, and for receiving the Booth encoded outputs from the encoder, the selector being configured to select a partial product bit according to the Booth encoded outputs and the bits of the second binary input number.

 
Web www.patentalert.com

> Flow-splitting and buffering PCI express switch to reduce head-of-line blocking

~ 00397