A FinFET transistor on SOI device and method of fabrication is provided. At least two FinFET fins each having an upper poly-silicate glass portion and a lower silicon portion are formed using spacer patterning technology. Each fin is formed on a sacrificial SiN mask layer having a sacrificial support structure. The SiN mask is removed and then a breakthrough etch is applied to remove an underlying pad oxide layer. A PSG layer defining a width of each of the fins on a sidewall of each of the support structures is deposited on each of the support structures. At least two fins each having a narrow fin pitch of about 0.25 .mu.m. are formed. The fins provide a seed layer for at least two selective epitaxially raised source and drain regions, wherein each raised source-drain associated with each fin are interconnected thus forming a source pad and a drain pad.

 
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> Through-wafer interconnects for photoimager and memory wafers

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