A chip-scale packaged IC is made by bonding one or more singulated die
chips (from an IC wafer) to a common substrate, such as a single cap
wafer (or a portion thereof) and cutting (singulating) the substrate to
yield individual, chip-scale packaged ICs. Alternatively, each die chip
is bonded to an individual, pre-cut cap. Electrically conductive paths
extend through the cap wafer, between wafer contact pads on the surface
of the cap and electrical contact points on the IC wafer. Optionally, the
cap wafer contains one or more die. The IC wafer can be fabricated
according to a different technology than the cap wafer, thereby forming a
hybrid chip-scale packaged IC. Optionally, additional "upper-level" cap
wafers (with or without die) can be stacked to form a "multi-story" IC.