The present invention provides a multilayered power supply line suitable
for use in a semiconductor integrated circuit and a layout method
thereof. In the multilayered power supply line (10) for the semiconductor
integrated circuit, a top metal (12) and a second metal (14) are
electrically connected to each other by through holes (18). Further, a
capacitor metal (16) is electrically connected to the top metal (12) by
through holes (20) to thereby make the top metal (12), the second metal
(14) and the capacitor metal (16) identical in potential to one another,
whereby the multilayered power supply line functions as a power supply
line based on normal wiring metals without functioning as a capacitor. It
is thus possible to supply power with reduced impedance.